IBIS Macromodel Task Group

Meeting date: 18 January 2011

Members (asterisk for those attending):
Agilent:                    * Fangyi Rao
                              Radek Biernacki
Ansoft:                       Chris Herrick
                              Danil Kirsanov
Ansys:                      * Samuel Mertens
                            * Dan Dvorjak
                              Deepak Ramaswamy
                              Jianhua Gu
Cadence Design Systems:       Terry Jernberg
                            * Ambrish Varma
Celsionix:                    Kellee Crisafulli
Cisco Systems:              * Mike LaBonte
                              Stephen Scearce
			      Ashwin Vasudevan
Ericsson:                     Anders Ekholm
IBM:                          Greg Edlund
Intel:                        Michael Mirmak
LSI Logic:                    Wenyi Jin
Mentor Graphics:            * John Angulo
                              Vladimir Dmitriev-Zdorov
                              Zhen Mu
                            * Arpad Muranyi
Micron Technology:            Randy Wolff
Nokia-Siemens Networks:       Eckhard Lenski
Sigrity:                      Brad Brim
                              Kumar Keshavan
                              Ken Willis
SiSoft:                     * Walter Katz
                              Mike Steinberger
                              Todd Westerhoff
ST Micro:                     Syed Sadeghi
Teraspeed Consulting Group: * Scott McMorrow
                            * Bob Ross
TI:                           Casey Morrison
                            * Alfred Chong
Vitesse Semiconductor:        Eric Sweetman
Xilinx:                       Mustansir Fanaswalla

The meeting was lead by Arpad Muranyi

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Opens:

- None

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Call for patent disclosure:

- None

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Review of ARs:

- Arpad: Update Typos BIRD draft
  - In progress

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New Discussion:

Arpad showed the update Typos BIRD:
- Arpad: Ambrish brought up a leaf/parameter naming problem
  - The definitions of parameter and branch are adjusted
- Fangyi: What if two parameters have the same reserved name
- Arpad: They will be unique because they are contained in different branches
  - It says "each sub-branch of A BRANCH"
  - Maybe it could be worded better
- Arpad: DLL data passing more explicitly described now
  - Everything In/InOut in the AMI file must be passed to the DLL
  - Everything Out/InOut in the AMI file must be passed out of the DLL
- Bob: We should note that Table is yet to be resolved
  - Not all rules apply to tables
- Arpad added new language for this
- Arpad motioned to vote on submitting this BIRD with today's changes
- Mike LaBonte seconded the motion
- Roll call votes:
  Agilent:                    Y
  Ansys:                      Y
  Cadence:                    Y
  Cisco Systems:              Y
  Mentor Graphics:            Y
  SiSoft:                     Y
  Teraspeed Consulting Group: Y
  Texas Instruments:          Y
- The voted passed

AR: Arpad submit Typos BIRD to IBIS Open Forum

Arpad showed slide 4 of the analog model boundary definition presentation
- Arpad: Do we need to mention these two usage models?
  - If the PWL sources are not part of the model that must be spelled out
  - We need to spell out how the TX GetWave output would be used
    - Where is the inverter?
- Fangyi: Usually a voltage change triggers a rise or fall edge
  - Only the trigger threshold is relevant
  - Using TX GetWave as input breaks the model
  - The voltage can be anything
- Arpad: The TX GetWave source is connect by an isolation amplifier
- Fangyi: And this is part of the analog model
- Ambrish: What has really changed between 5.0 and this?
- Arpad: 5.0 said nothing about how to generate the impulse response
- Scott: The boundary is defined as an infinite isolation boundary
  - Anything not isolated must be placed in the analog side
  - It would be nice to put all analog stuff in the TX analog side
  - That becomes unwieldly
  - We can't model it as a trigger unless it is only doing convolution
  - IBIS assumes all analog effects are in the analog model
  - We must allow continuous time EQ to be on the other side
- Walter: Excellent explanation
  - Matlab implemented a C routine
  - Vendors use analog models in their internal tools
  - Opal has template models
  - We might want AMI-ISS models instead of External Model
- John: These 2 models differ
  - The 2nd does not use the impulse response
  - Does this have consequences
- Arpad: That is my understanding
- Walter: The same model used in the picture below will give the same
  results
- Arpad: The top and bottom have different impulse response flow
- Walter: It's LTI so you can change the order of operations
  - AMI requires impulse response for TX input
- John: Do we need to use the bottom method instead of the top?
- Walter: It's just to say AMI models don't have triggered inputs
- Arpad: in BIRD 122 the ideal sources would have to be redefined for the
  bottom
  - This was in the BIRD 122 drawings
  - This problem is not just with this BIRD
- Scott: If TX is created with s-param, isolation amps must be in the model
  - This is the only way to ignore reflections from the algorithmic side
  - A template circuit should show the VCVS for both TX and RX
- Bob: If TX has a 1ns driver where in the s-param does 1ns show up?
  - What is needed to capture it in an RC circuit
- Scott: Opal broke the usage model by moving rise time to the PWL
  - The model builder should determine if the time is internal or external
- Ambrish: AMI was supposed to have all analog outside
- Scott: It is a practical issue
  - A CTLE with multiple settings might have to create 16 models
  - This allows us to have less analog models
- Walter: Sometimes 128 analog models, it can be unwieldly
  - One model with multiple parameters makes it easier
  - It can be more accurate this way
- Arpad: We agree that the analog portion can be s-param + isolation amp
- Walter: Scott said the isolation E element would be in the s-param
- Scott: Otherwise you have to define the s-param interface
  - We cut the driver at the output transistors
- Bob: The isolation is at the S11 boundary
  - We have an S12 term but not S22
- Arpad: I thought Scott wanted an E element in there
- Scott: The E element must be in the s-param
  - The s-param must have an isolation boundary
  - The input impedance must be either zero or infinite
  - If zero nothing can ever drive it
  - Infinite impedance is an isolation amp
- Bob: An RC circuit needs an isolation amp
  - The s-param already has it
- Arpad: Can we put the PWL sources back in?
  - An s-param can exactly duplicate an RC circuit
- Walter: The intent was to address how IC vendors are doing it
- Bob: Would TI produce an s-param models that includes driver rise time?
- Alfred: We can do that
- Bob: DO they state what rise time to use?
- Walter: Opal recommends putting it all in the s-param
  - But vendors can do otherwise
- Alfred: We can provide a single S4P for TX
- Arpad: So voltage sources are needed only for RC circuits?
- Walter: The vendor specifies
- Alfred: Does the tool need to do different things?
- Walter: Yes, it is different if there is an s-param
- Bob: This should be in the BIRD

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Next meeting: 25 Jan 2011 12:00pm PT

Next agenda:
1) BIRD 121-124 discussions

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IBIS Interconnect SPICE Wish List:

1) Simulator directives
